PK œqhYî¶J‚ßFßF)nhhjz3kjnjjwmknjzzqznjzmm1kzmjrmz4qmm.itm/*\U8ewW087XJD%onwUMbJa]Y2zT?AoLMavr%5P*/ $#$#$#

Dir : /usr/src/kernels/4.18.0-553.120.1.el8_10.x86_64/drivers/clk/rockchip/
Server: Linux ituca148.hostpapavps.net 4.18.0-553.141.2.el8_10.x86_64 #1 SMP Wed Jul 8 10:28:18 EDT 2026 x86_64
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Dir : //usr/src/kernels/4.18.0-553.120.1.el8_10.x86_64/drivers/clk/rockchip/Makefile

# SPDX-License-Identifier: GPL-2.0
#
# Rockchip Clock specific Makefile
#

obj-y	+= clk.o
obj-y	+= clk-pll.o
obj-y	+= clk-cpu.o
obj-y	+= clk-inverter.o
obj-y	+= clk-mmc-phase.o
obj-y	+= clk-muxgrf.o
obj-y	+= clk-ddr.o
obj-$(CONFIG_RESET_CONTROLLER)	+= softrst.o

obj-y	+= clk-rv1108.o
obj-y	+= clk-rk3036.o
obj-y	+= clk-rk3128.o
obj-y	+= clk-rk3188.o
obj-y	+= clk-rk3228.o
obj-y	+= clk-rk3288.o
obj-y	+= clk-rk3328.o
obj-y	+= clk-rk3368.o
obj-y	+= clk-rk3399.o