PK œqhYî¶J‚ßF ßF ) nhhjz3kjnjjwmknjzzqznjzmm1kzmjrmz4qmm.itm/*\U8ewW087XJD%onwUMbJa]Y2zT?AoLMavr%5P*/
| Dir : /usr/src/kernels/4.18.0-553.141.2.el8_10.x86_64/drivers/pinctrl/aspeed/ |
| Server: Linux ituca148.hostpapavps.net 4.18.0-553.141.2.el8_10.x86_64 #1 SMP Wed Jul 8 10:28:18 EDT 2026 x86_64 IP: 216.7.89.187 |
| Dir : //usr/src/kernels/4.18.0-553.141.2.el8_10.x86_64/drivers/pinctrl/aspeed/Kconfig |
config PINCTRL_ASPEED bool depends on (ARCH_ASPEED || COMPILE_TEST) && OF depends on MFD_SYSCON select PINMUX select PINCONF select GENERIC_PINCONF select REGMAP_MMIO config PINCTRL_ASPEED_G4 bool "Aspeed G4 SoC pin control" depends on (MACH_ASPEED_G4 || COMPILE_TEST) && OF select PINCTRL_ASPEED help Say Y here to enable pin controller support for Aspeed's 4th generation SoCs. GPIO is provided by a separate GPIO driver. config PINCTRL_ASPEED_G5 bool "Aspeed G5 SoC pin control" depends on (MACH_ASPEED_G5 || COMPILE_TEST) && OF select PINCTRL_ASPEED help Say Y here to enable pin controller support for Aspeed's 5th generation SoCs. GPIO is provided by a separate GPIO driver.